q41402169的专栏

XC7K325T原理图封装ORCAD

PEX8624原理图orCAD封装

PEX8724原理图orcad封装

PEX8748设计资料

XYI9322设计文档.zip，包含手册及参考手册

TC358870XBG的开发板原理图，可以用于硬件设计参考，Cadence的PDF版本。 TC358870XBG_Evaluation Board（评估板原理图）.pdf

BCM5396的手册，硬件设计参考，可以用于硬件设计。5396-DS116-R.pdf和538X_5396-AN105-R.pdf

Xilinx Vivado SRIO licence，Vivado2016 2017 2018 2019 2020均可使用

BCM5464R的最新版器件手册。 The BCM5464R transceiver consists of four triplespeed 10/100/1000BASE-T Ethernet transceivers. The device performs all of the physical layer functions for 1000BASE-T, 100BASE-TX and 10BASE-T Ethernet on standard Category 5 UTP cable. The BCM5464R is designed to be fully compliant with the SGMII, RGMII, and RTBI industry standards. The BCM5464R is based on Broadcom’s proven digital signal processor technology, combining digital adaptive equalizers, ADCs, phase-locked loops, line drivers, encoders, decoders, echo cancelers, crosstalk cancelers and all other required support circuitry integrated into a single monolithic CMOS chip. Designed for reliable operation over worst-case Category 5 cable plants, the BCM5464R automatically negotiates with any transceiver on the opposite end of the wire to agree on an operating speed. The PHY can also evaluate the condition of the twisted-pair wiring to ensure that the wiring can support operation at Gigabit speeds, and detect and correct most common wiring problems. The device continually monitors both the wiring and the opposing transceiver, and alerts the system if it detects potential problems with reliable operation. For single-port applications, refer to the BCM5461 or BCM5461S data sheets

CCS5.0 5.1可使用的license